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| author | Charlene Liu <charlene.liu@amd.com> | 2023-12-06 17:14:48 -0500 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2023-12-19 15:22:59 -0500 |
| commit | 51e7b64690776a9981355428b537af9048308a95 (patch) | |
| tree | 48f28cf5e547780aec05922d83b9cf2b34873c02 /scripts/rust_is_available_test.py | |
| parent | 989824589f793120833bef13aa4e21f5a836a707 (diff) | |
drm/amd/display: get dprefclk ss info from integration info table
[why & how]
we have two SSC_En:
we get ssc_info from dce_info for MPLL_SSC_EN.
we used to call VBIOS cmdtbl's smu_info's SS persentage for DPRECLK SS info,
is used for DP AUDIO and VBIOS' smu_info table was from systemIntegrationInfoTable.
since dcn35 VBIOS removed smu_info, driver need to use integrationInfotable directly.
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Acked-by: Wayne Lin <wayne.lin@amd.com>
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'scripts/rust_is_available_test.py')
0 files changed, 0 insertions, 0 deletions