diff options
| author | Emil Renner Berthing <kernel@esmil.dk> | 2021-10-10 16:48:27 +0200 |
|---|---|---|
| committer | Emil Renner Berthing <kernel@esmil.dk> | 2021-12-16 17:24:23 +0100 |
| commit | ec85362fb121d0297b9f3bb56816ea6282c34fda (patch) | |
| tree | a71e08b3678a04b80def219a2e59842524696477 /scripts/mod/file2alias.c | |
| parent | b0ad20a3b64bf653a717860819691b262c0b2a2b (diff) | |
RISC-V: Add initial StarFive JH7100 device tree
Add initial device tree for the JH7100 RISC-V SoC by StarFive Ltd. This
is a test chip for their upcoming JH7110 SoC.
The CPU and cache data is based on the device tree in the vendor u-boot
port.
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Diffstat (limited to 'scripts/mod/file2alias.c')
0 files changed, 0 insertions, 0 deletions