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| author | Bjorn Andersson <[email protected]> | 2024-05-25 10:56:20 -0700 |
|---|---|---|
| committer | Bjorn Andersson <[email protected]> | 2024-05-26 18:58:40 -0500 |
| commit | dc402e084a9e0cc714ffd6008dce3c63281b8142 (patch) | |
| tree | 9dc549a329f6ffa552161de5b4720f98f6475645 /scripts/git.orderFile | |
| parent | 8ed45f79142caeefa42e98eb243df35746123c09 (diff) | |
arm64: dts: qcom: sc8180x: Correct PCIe slave ports
The interconnects property was clearly copy-pasted between the 4 PCIe
controllers, giving all four the cpu-pcie path destination of SLAVE_0.
The four ports are all associated with CN0, but update the property for
correctness sake.
Fixes: d20b6c84f56a ("arm64: dts: qcom: sc8180x: Add PCIe instances")
Signed-off-by: Bjorn Andersson <[email protected]>
Reviewed-by: Dmitry Baryshkov <[email protected]>
Link: https://lore.kernel.org/r/20240525-sc8180x-pcie-interconnect-port-fix-v1-1-f86affa02392@quicinc.com
Signed-off-by: Bjorn Andersson <[email protected]>
Diffstat (limited to 'scripts/git.orderFile')
0 files changed, 0 insertions, 0 deletions