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| author | Alvin Lee <[email protected]> | 2023-12-01 06:25:07 -0700 |
|---|---|---|
| committer | Alex Deucher <[email protected]> | 2023-12-06 15:59:17 -0500 |
| commit | fec05adc40c25a028c9dfa9d540f800a2d433f80 (patch) | |
| tree | 5ae3e9616646bb755a4ee89d3a58015493c23be1 /scripts/generate_rust_analyzer.py | |
| parent | d6a57588666301acd9d42d3b00d74240964f07f6 (diff) | |
drm/amd/display: Use channel_width = 2 for vram table 3.0
VBIOS has suggested to use channel_width=2 for any ASIC that uses vram
info 3.0. This is because channel_width in the vram table no longer
represents the memory width
Tested-by: Daniel Wheeler <[email protected]>
Reviewed-by: Samson Tam <[email protected]>
Acked-by: Rodrigo Siqueira <[email protected]>
Signed-off-by: Alvin Lee <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions