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authorSamuel Holland <[email protected]>2023-11-21 13:19:29 -0800
committerPalmer Dabbelt <[email protected]>2023-12-06 07:15:19 -0800
commitf40cab8e18ed57d2c7b5213437d83d955f78097f (patch)
treeaf8e911c51379c8a589c532dc0463504971b5871 /scripts/generate_rust_analyzer.py
parent96ba4a47d147cf8c4b764ec3a66a088a5bb3033a (diff)
riscv: Fix SMP when shadow call stacks are enabled
This fixes two bugs in SCS initialization for secondary CPUs. First, the SCS was not initialized at all in the spinwait boot path. Second, the code for the SBI HSM path attempted to initialize the SCS before enabling the MMU. However, that involves dereferencing the thread pointer, which requires the MMU to be enabled. Fix both issues by setting up the SCS in the common secondary entry path, after enabling the MMU. Fixes: d1584d791a29 ("riscv: Implement Shadow Call Stack") Signed-off-by: Samuel Holland <[email protected]> Reviewed-by: Sami Tolvanen <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Palmer Dabbelt <[email protected]>
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