diff options
| author | Biju Das <[email protected]> | 2023-11-22 14:23:06 +0000 |
|---|---|---|
| committer | Stephen Boyd <[email protected]> | 2023-12-17 15:56:14 -0800 |
| commit | eb16ddb838dd8602961b5fc17d1350cd41ae69e0 (patch) | |
| tree | 421711d7787f314e1769dc3d4cee3e3fd843606f /scripts/generate_rust_analyzer.py | |
| parent | b85ea95d086471afb4ad062012a4d73cd328fa86 (diff) | |
clk: versaclock3: Update vc3_get_div() to avoid divide by zero
Update vc3_get_div() to avoid divide by zero operation on
vc3_div_round_rate() by returning1, if there is no table match
found.
Signed-off-by: Biju Das <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Stephen Boyd <[email protected]>
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions