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authorConor Dooley <[email protected]>2023-10-24 09:20:35 +0100
committerConor Dooley <[email protected]>2023-11-16 21:43:52 +0000
commite80ed63affc9a9b4aacb44180ecd7ed601839599 (patch)
tree37069090145850568925115d1448c95ad985048a /scripts/generate_rust_analyzer.py
parentb85ea95d086471afb4ad062012a4d73cd328fa86 (diff)
riscv: dts: sophgo: remove address-cells from intc node
A recent submission [1] from Rob has added additionalProperties: false to the interrupt-controller child node of RISC-V cpus, highlighting that the new cv1800b DT has been incorrectly using #address-cells. It has no child nodes, so #address-cells is not needed. Remove it. Link: https://patchwork.kernel.org/project/linux-riscv/patch/[email protected]/ [1] Fixes: c3dffa879cca ("riscv: dts: sophgo: add initial CV1800B SoC device tree") Reviewed-by: Jisheng Zhang <[email protected]> Acked-by: Chen Wang <[email protected]> Signed-off-by: Conor Dooley <[email protected]>
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