diff options
| author | LeoLiuoc <[email protected]> | 2023-12-11 17:15:43 +0800 |
|---|---|---|
| committer | Bjorn Helgaas <[email protected]> | 2023-12-11 14:05:32 -0600 |
| commit | e367e3c765f5477b2e79da0f1399aed49e2d1e37 (patch) | |
| tree | e1edcebd83e58a362113a8854aa065b8ba942907 /scripts/generate_rust_analyzer.py | |
| parent | b85ea95d086471afb4ad062012a4d73cd328fa86 (diff) | |
PCI: Add ACS quirk for more Zhaoxin Root Ports
Add more Root Port Device IDs to pci_quirk_zhaoxin_pcie_ports_acs() for
some new Zhaoxin platforms.
Fixes: 299bd044a6f3 ("PCI: Add ACS quirk for Zhaoxin Root/Downstream Ports")
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: LeoLiuoc <[email protected]>
[bhelgaas: update subject, drop changelog, add Fixes, add stable tag, fix
whitespace, wrap code comment]
Signed-off-by: Bjorn Helgaas <[email protected]>
Cc: <[email protected]> # 5.7
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions