diff options
author | Shashank Babu Chinta Venkata <[email protected]> | 2024-09-11 20:56:28 +0530 |
---|---|---|
committer | Krzysztof Wilczyński <[email protected]> | 2024-09-13 14:44:57 +0000 |
commit | d45736b5984954da71292d858f277bac9c70cd2e (patch) | |
tree | 0fc202a917dc949a0b645ee662f57a2423d2add7 /scripts/generate_rust_analyzer.py | |
parent | 19a69cbd9d436fe503e5cb6dade76fe371244d4f (diff) |
PCI: qcom: Add equalization settings for 16.0 GT/s
During high data transmission rates such as 16.0 GT/s, there is an
increased risk of signal loss due to poor channel quality and
interference. This can impact receiver's ability to capture signals
accurately.
Hence, as signal compensation is achieved through appropriate lane
equalization, apply lane equalization settings at both transmitter
and receiver which results in an increase in the PCIe signal strength.
While at it, modify the pcie-tegra194 driver to make use of the
common GEN3_EQ_CONTROL_OFF definitions in pcie-designware.h.
Link: https://lore.kernel.org/linux-pci/[email protected]
Tested-by: Johan Hovold <[email protected]>
Signed-off-by: Shashank Babu Chinta Venkata <[email protected]>
[mani: dropped the code refactoring and minor changes]
Signed-off-by: Manivannan Sadhasivam <[email protected]>
[kwilczynski: commit log]
Signed-off-by: Krzysztof Wilczyński <[email protected]>
Reviewed-by: Johan Hovold <[email protected]>
Reviewed-by: Manivannan Sadhasivam <[email protected]>
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions