diff options
author | Cruise Hung <[email protected]> | 2023-03-02 10:33:51 +0800 |
---|---|---|
committer | Alex Deucher <[email protected]> | 2023-03-15 18:18:45 -0400 |
commit | cbd6c1b17d3b42b7935526a86ad5f66838767d03 (patch) | |
tree | a3b06a3ed7d1265278abbc1e0fa35e3b5feb0901 /scripts/generate_rust_analyzer.py | |
parent | 56574f89dbd84004c3fd6485bcaafb5aa9b8be14 (diff) |
drm/amd/display: Fix DP MST sinks removal issue
[Why]
In USB4 DP tunneling, it's possible to have this scenario that
the path becomes unavailable and CM tears down the path a little bit late.
So, in this case, the HPD is high but fails to read any DPCD register.
That causes the link connection type to be set to sst.
And not all sinks are removed behind the MST branch.
[How]
Restore the link connection type if it fails to read DPCD register.
Cc: [email protected]
Cc: Mario Limonciello <[email protected]>
Reviewed-by: Wenjing Liu <[email protected]>
Acked-by: Qingqing Zhuo <[email protected]>
Signed-off-by: Cruise Hung <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions