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authorLareine Khawaly <[email protected]>2022-12-21 19:59:00 +0000
committerWolfram Sang <[email protected]>2023-01-09 13:05:35 +0100
commitc8c37bc514514999e62a17e95160ed9ebf75ca8d (patch)
tree1d155c99efa0a9e4bbee4021b10e7fa9b14f9e6b /scripts/generate_rust_analyzer.py
parentb7bfaa761d760e72a969d116517eaa12e404c262 (diff)
i2c: designware: use casting of u64 in clock multiplication to avoid overflow
In functions i2c_dw_scl_lcnt() and i2c_dw_scl_hcnt() may have overflow by depending on the values of the given parameters including the ic_clk. For example in our use case where ic_clk is larger than one million, multiplication of ic_clk * 4700 will result in 32 bit overflow. Add cast of u64 to the calculation to avoid multiplication overflow, and use the corresponding define for divide. Fixes: 2373f6b9744d ("i2c-designware: split of i2c-designware.c into core and bus specific parts") Signed-off-by: Lareine Khawaly <[email protected]> Signed-off-by: Hanna Hawa <[email protected]> Reviewed-by: Andy Shevchenko <[email protected]> Acked-by: Jarkko Nikula <[email protected]> Signed-off-by: Wolfram Sang <[email protected]>
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