diff options
| author | Claudiu Beznea <[email protected]> | 2023-09-12 07:51:31 +0300 |
|---|---|---|
| committer | Geert Uytterhoeven <[email protected]> | 2023-09-18 10:05:02 +0200 |
| commit | becf4a771a12b52dc5b3d2b089598d5603f3bbec (patch) | |
| tree | 234e1042505825a5cdc0a9fb58cc582add0916e4 /scripts/generate_rust_analyzer.py | |
| parent | 17939df3c9acd26e4dac1c5943dd8e58e1bcb4e7 (diff) | |
clk: renesas: rzg2l: Simplify the logic in rzg2l_mod_clock_endisable()
The bitmask << 16 is anyway set on both branches of if thus move it
before the if and set the lower bits of registers only in case clock is
enabled.
Signed-off-by: Claudiu Beznea <[email protected]>
Reviewed-by: Geert Uytterhoeven <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Geert Uytterhoeven <[email protected]>
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions