aboutsummaryrefslogtreecommitdiff
path: root/scripts/generate_rust_analyzer.py
diff options
context:
space:
mode:
authorMatthew Gerlach <[email protected]>2024-07-02 11:26:52 -0500
committerKrzysztof Wilczyński <[email protected]>2024-09-04 15:22:38 +0000
commitb08929e1ec2f69db49e119a0d6af7cf32c813f5e (patch)
tree263c72a9f3f38f71bf6a347d639c8dd2ca751bb2 /scripts/generate_rust_analyzer.py
parent364cfd8a56c0eec874057514b8cee220494746f5 (diff)
dt-bindings: PCI: altera: Convert to YAML
Convert the devicetree bindings for the Altera Root Port PCIe controller from text to YAML. While at it, update the entries in the interrupt-map field to have the correct number of address cells for the interrupt parent. Link: https://lore.kernel.org/linux-pci/[email protected] Signed-off-by: Matthew Gerlach <[email protected]> [kwilczynski: commit log] Signed-off-by: Krzysztof Wilczyński <[email protected]> Reviewed-by: Conor Dooley <[email protected]>
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions