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authorSunil V L <[email protected]>2023-05-15 11:19:20 +0530
committerPalmer Dabbelt <[email protected]>2023-06-01 08:45:07 -0700
commit914d6f44fc50744163e9bba7178644231f77a46a (patch)
tree3522924f1940be6bf80b6d691e897f92063f999d /scripts/generate_rust_analyzer.py
parentce92546cd63779445d205e3153defedacf8b08c6 (diff)
RISC-V: only iterate over possible CPUs in ISA string parser
During boot we call riscv_of_processor_hartid() for each hart that we add to the possible cpus list. Repeating the call again here is not required, if we iterate over the list of possible CPUs, rather than the list of all CPUs. The call to of_property_read_string() for "riscv,isa" cannot fail either, as it has previously succeeded in riscv_of_processor_hartid(), but leaving in the error checking makes the operation of the loop more obvious & provides leeway for future refactoring of riscv_of_processor_hartid(). Signed-off-by: Sunil V L <[email protected]> Co-developed-by: Conor Dooley <[email protected]> Signed-off-by: Conor Dooley <[email protected]> Reviewed-by: Andrew Jones <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Palmer Dabbelt <[email protected]>
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