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authorTudor Ambarus <[email protected]>2024-02-16 07:05:44 +0000
committerMark Brown <[email protected]>2024-03-05 20:42:49 +0000
commit80a38bfbbd5965c8bda73b20aa78d308739bbc31 (patch)
tree0bba3d844745c42723e084da713dbbbfdef64f93 /scripts/generate_rust_analyzer.py
parent0f1a277b3d9be9fff0a0d9c6b63492815ede5eb3 (diff)
spi: dt-bindings: introduce FIFO depth properties
There are SPI IPs that can be configured by the integrator with a specific FIFO depth depending on the system's capabilities. For example, the samsung USI SPI IP can be configured by the integrator with a TX/RX FIFO from 8 byte to 256 bytes. Introduce the ``fifo-depth`` property for such instances of IPs where the same FIFO depth is used for both RX and TX. Introduce ``rx-fifo-depth`` and ``tx-fifo-depth`` properties for cases where the RX FIFO depth is different from the TX FIFO depth. Make the dedicated RX/TX properties dependent on each other and mutual exclusive with the other. Reviewed-by: Rob Herring <[email protected]> Signed-off-by: Tudor Ambarus <[email protected]> Reviewed-by: Conor Dooley <[email protected]> Link: https://msgid.link/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
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