diff options
| author | Shengjiu Wang <[email protected]> | 2024-09-30 14:08:28 +0800 |
|---|---|---|
| committer | Mark Brown <[email protected]> | 2024-09-30 23:30:32 +0100 |
| commit | 72455e33173c1a00c0ce93d2b0198eb45d5f4195 (patch) | |
| tree | ed51be3d2f77293c902745005d096ef083b614c2 /scripts/generate_rust_analyzer.py | |
| parent | a36614bf88cd4b43984f24fd960c7aa0e43b5fb7 (diff) | |
ASoC: fsl_sai: Enable 'FIFO continue on error' FCONT bit
FCONT=1 means On FIFO error, the SAI will continue from the
same word that caused the FIFO error to set after the FIFO
warning flag has been cleared.
Set FCONT bit in control register to avoid the channel swap
issue after SAI xrun.
Signed-off-by: Shengjiu Wang <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Mark Brown <[email protected]>
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions