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authorBenjamin Gaignard <[email protected]>2023-05-03 09:34:32 +0100
committerMauro Carvalho Chehab <[email protected]>2023-06-09 16:15:38 +0100
commit7040ed4ee68cae6d4571ab5b7ce1311de13f74c1 (patch)
tree880fdf629428e2327f191131c7f1462ae29daa87 /scripts/generate_rust_analyzer.py
parent53421e73b6a20cf0952c9428d003c45a10435776 (diff)
media: verisilicon: Check AV1 bitstreams bit depth
The driver supports 8 and 10 bits bitstreams, make sure to discard other cases. It could happens that userland test if V4L2_CID_STATELESS_AV1_SEQUENCE exists without setting bit_depth field in this case use HANTRO_DEFAULT_BIT_DEPTH value. Signed-off-by: Benjamin Gaignard <[email protected]> Reviewed-by: Nicolas Dufresne <[email protected]> Signed-off-by: Hans Verkuil <[email protected]> Signed-off-by: Mauro Carvalho Chehab <[email protected]>
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