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authorTinghan Shen <[email protected]>2023-09-01 16:09:32 +0800
committerMathieu Poirier <[email protected]>2023-09-13 11:46:16 -0600
commit5d5cfce48069df97ae83d001187f69d63b87242f (patch)
tree3bd3f96a7a871ff2ec0ef11b3eb4de2aa505499b /scripts/generate_rust_analyzer.py
parentc01fb97cf2b55b155ee99c1ad51672f80042a922 (diff)
remoteproc: mediatek: Handle MT8195 SCP core 1 watchdog timeout
The MT8195 SCP core 1 watchdog timeout needs to be handled in the SCP core 0 IRQ handler because the MT8195 SCP core 1 watchdog timeout IRQ is wired on the same IRQ entry for core 0 watchdog timeout. MT8195 SCP has a watchdog status register to identify the watchdog timeout source when IRQ triggered. Signed-off-by: Tinghan Shen <[email protected]> Reviewed-by: AngeloGioacchino Del Regno <[email protected]> Tested-by: AngeloGioacchino Del Regno <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mathieu Poirier <[email protected]>
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