diff options
| author | Claudiu Beznea <[email protected]> | 2023-10-10 16:26:57 +0300 |
|---|---|---|
| committer | Geert Uytterhoeven <[email protected]> | 2023-10-12 20:05:52 +0200 |
| commit | 4bce4bedbe6daa54cf701184601f913a0c00bb1c (patch) | |
| tree | 0c9f96ba77b1edf1eafbc7ca21b1bd4248c17146 /scripts/generate_rust_analyzer.py | |
| parent | fd627207aaa782c1fd4224076b56a03a1059f516 (diff) | |
clk: renesas: r9a08g045: Add clock and reset support for SDHI1 and SDHI2
Add clock and reset support for the SDHI1 and SDHI2 blocks on the
RZ/G3S (R9A08G045) SoC.
Signed-off-by: Claudiu Beznea <[email protected]>
Reviewed-by: Geert Uytterhoeven <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Geert Uytterhoeven <[email protected]>
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions