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author | Siming Wan <siming.wan@intel.com> | 2024-03-06 21:58:51 +0800 |
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committer | Herbert Xu <herbert@gondor.apana.org.au> | 2024-04-02 10:47:43 +0800 |
commit | 3fa1057e35474c715608635a0bf7452397580bfd (patch) | |
tree | dd3ddaddeba89b5511966bf68b812ceab3f206ee /scripts/generate_rust_analyzer.py | |
parent | 84058ffb919bf6a6aac24d2baf7fce442d24f390 (diff) |
crypto: qat - expand CSR operations for QAT GEN4 devices
Extend the CSR operations for QAT GEN4 devices to allow saving and
restoring the rings state.
The new operations will be used as a building block for implementing the
state save and restore of Virtual Functions necessary for VM live
migration.
This adds the following operations:
- read ring status register
- read ring underflow/overflow status register
- read ring nearly empty status register
- read ring nearly full status register
- read ring full status register
- read ring complete status register
- read ring exception status register
- read/write ring exception interrupt mask register
- read ring configuration register
- read ring base register
- read/write ring interrupt enable register
- read ring interrupt flag register
- read/write ring interrupt source select register
- read ring coalesced interrupt enable register
- read ring coalesced interrupt control register
- read ring flag and coalesced interrupt enable register
- read ring service arbiter enable register
- get ring coalesced interrupt control enable mask
Signed-off-by: Siming Wan <siming.wan@intel.com>
Reviewed-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com>
Signed-off-by: Xin Zeng <xin.zeng@intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions