diff options
| author | Dan Williams <[email protected]> | 2022-12-05 20:28:34 -0800 |
|---|---|---|
| committer | Dan Williams <[email protected]> | 2022-12-06 14:37:52 -0800 |
| commit | 372ab3bc3711db46ae1205401c2aac2ed16fc348 (patch) | |
| tree | 340d9c7d16ea006c6155ca8c3a7169341e1a72ef /scripts/generate_rust_analyzer.py | |
| parent | 7fe898041fb0c8e630504ecc2cb8805651ac85c1 (diff) | |
cxl/pci: Add some type-safety to the AER trace points
The first argument to the CXL AER trace points is the source device.
Pass a 'const struct device *' rather than a 'const char *' for more
type precision / safety.
Cc: Jonathan Cameron <[email protected]>
Cc: Dave Jiang <[email protected]>
Cc: Steven Rostedt <[email protected]>
Reviewed-by: Dave Jiang <[email protected]>
Reviewed-by: Jonathan Cameron <[email protected]>
Reviewed-by: Ira Weiny <[email protected]>
Link: https://lore.kernel.org/r/167030091477.4045167.15174636482098463885.stgit@dwillia2-xfh.jf.intel.com
Signed-off-by: Dan Williams <[email protected]>
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions