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authorNicholas Kazlauskas <[email protected]>2023-11-14 11:22:09 -0500
committerAlex Deucher <[email protected]>2023-11-29 18:11:03 -0500
commit27750e176a4f8549e13fa91f311b29a2e40d47be (patch)
treed0871f219159d28db3ebec4d243e4a015420277c /scripts/generate_rust_analyzer.py
parent2161e09cd05a50d80736fe397145340d2e8f6c05 (diff)
drm/amd/display: Allow DTBCLK disable for DCN35
[Why] DTBCLK is enabled on idle and it will burn power. [How] There's a few issues here: - Always enabling DTBCLK on clock manager init - Setting refclk when DTBCLK is supposed to be disabled - Not applying the correct calculated version refclk, but instead the base value which might be zero On dtbclk_en change we'll message PMFW to enable or disable the clock accordingly. The DTBDTO will be then based on refclk, but it will be set to the default fixed value if there was nothing calculated in DML despite the clock being considered enabled. Reviewed-by: Charlene Liu <[email protected]> Acked-by: Tom Chung <[email protected]> Signed-off-by: Nicholas Kazlauskas <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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