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| author | Conor Dooley <[email protected]> | 2023-02-22 12:46:11 +0000 |
|---|---|---|
| committer | Stephen Boyd <[email protected]> | 2023-03-06 12:17:49 -0800 |
| commit | 26243872fe26ec0df7d81766253d00213990e382 (patch) | |
| tree | a5d856396446681c6dc03874330587c0d298ddb7 /scripts/generate_rust_analyzer.py | |
| parent | 0ffad67784a097beccf34d297ddd1b0773b3b8a3 (diff) | |
MAINTAINERS: add missing clock driver coverage for Microchip FPGAs
When the CCC support was added, the clock binding coverage was
converted to a regex in commit 71c8517e004b ("MAINTAINERS: update
polarfire soc clock binding"), but the coverage for the clock drivers
themselves was not updated. Rectify that now.
Signed-off-by: Conor Dooley <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Stephen Boyd <[email protected]>
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions