diff options
| author | Ville Syrjälä <[email protected]> | 2023-11-27 16:50:25 +0200 |
|---|---|---|
| committer | Jani Nikula <[email protected]> | 2023-12-05 10:42:53 +0200 |
| commit | 20c2dbff342aec13bf93c2f6c951da198916a455 (patch) | |
| tree | 64572bbee5fe321e4c2f573960055a03e7b26ed9 /scripts/generate_rust_analyzer.py | |
| parent | 96d7e79401364c6e9a63af5f74f76792b03cb832 (diff) | |
drm/i915: Skip some timing checks on BXT/GLK DSI transcoders
Apparently some BXT/GLK systems have DSI panels whose timings
don't agree with the normal cpu transcoder hblank>=32 limitation.
This is perhaps fine as there are no specific hblank/etc. limits
listed for the BXT/GLK DSI transcoders.
Move those checks out from the global intel_mode_valid() into
into connector specific .mode_valid() hooks, skipping BXT/GLK
DSI connectors. We'll leave the basic [hv]display/[hv]total
checks in intel_mode_valid() as those seem like sensible upper
limits regardless of the transcoder used.
Cc: [email protected]
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/9720
Fixes: 8f4b1068e7fc ("drm/i915: Check some transcoder timing minimum limits")
Signed-off-by: Ville Syrjälä <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
Reviewed-by: Jani Nikula <[email protected]>
(cherry picked from commit e0ef2daa8ca8ce4dbc2fd0959e383b753a87fd7d)
Signed-off-by: Jani Nikula <[email protected]>
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions