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authorSteffen Persvold <[email protected]>2024-07-07 02:35:15 +0200
committerPalmer Dabbelt <[email protected]>2024-09-15 20:15:50 -0700
commit1845d381f28063a3b68e9e148d5a7f01d6be8721 (patch)
treed86517222c3046948e925150e45d33d47ffd35fa /scripts/generate_rust_analyzer.py
parentcea9d27705d62984faf6137963c10bf26b967996 (diff)
riscv: cacheinfo: Add back init_cache_level() function
commit 5944ce092b97 (arch_topology: Build cacheinfo from primary CPU) removed the init_cache_level() function from arch/riscv/kernel/cacheinfo.c and relies on the init_cpu_topology() function in drivers/base/arch_topology.c to call fetch_cache_info() which in turn calls init_of_cache_level() to populate the cache hierarchy information. However, init_cpu_topology() is only called from smpboot.c:smp_prepare_cpus() and thus only available when CONFIG_SMP is defined. To support non-SMP enabled kernels to still detect cache hierarchy, we add back the init_cache_level() function. The init_level_allocate_ci() function handles this gracefully on SMP-enabled kernels anyway where fetch_cache_info() is called from init_cpu_topology() earlier in the boot phase. Signed-off-by: Steffen Persvold <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Palmer Dabbelt <[email protected]>
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