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| author | Radhakrishna Sripada <[email protected]> | 2023-12-07 14:10:24 -0800 |
|---|---|---|
| committer | Radhakrishna Sripada <[email protected]> | 2023-12-08 10:59:52 -0800 |
| commit | 1103672fd6b8486c4cc1ab69623e9a080a00e022 (patch) | |
| tree | e1bebc3035954b452e69335d7844341032b1057e /scripts/generate_rust_analyzer.py | |
| parent | 877fd09a120d0acee073fbada79fad2ab35396c2 (diff) | |
drm/i915/mtl: Remove misleading "clock" field from C20 pll_state
The field link_bit_rate serves as the actual clock value for the C20
pll_state structure. Remove the misleading clock field. The subsequent
patch would rename the link_bit_rate as the clock field.
Cc: Clint Taylor <[email protected]>
Cc: Mika Kahola <[email protected]>
Signed-off-by: Radhakrishna Sripada <[email protected]>
Reviewed-by: Mika Kahola <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions