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| author | Olivier Moysan <[email protected]> | 2019-02-26 14:51:04 +0100 |
|---|---|---|
| committer | Mark Brown <[email protected]> | 2019-02-26 15:36:40 +0000 |
| commit | 8ba3c5215d69c09f5c39783ff3b78347769822ad (patch) | |
| tree | c5e4f2934aa42316a9973a904cd993f17473e8eb /scripts/gen_compile_commands.py | |
| parent | ae3f563a85e96cc8ba68ba2eae36da9bba6e9c4a (diff) | |
ASoC: stm32: i2s: fix IRQ clearing
Because of regmap cache, interrupts may not be cleared
as expected.
Declare IFCR register as write only and make writings
to IFCR register unconditional.
Signed-off-by: Olivier Moysan <[email protected]>
Signed-off-by: Mark Brown <[email protected]>
Diffstat (limited to 'scripts/gen_compile_commands.py')
0 files changed, 0 insertions, 0 deletions