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authorMika Westerberg <[email protected]>2023-04-04 08:27:13 +0300
committerBjorn Helgaas <[email protected]>2023-04-11 17:35:02 -0500
commite8b908146d44310473e43b3382eca126e12d279c (patch)
treec73e362c532672a188134c57c0a3f017f286e878 /scripts/gdb/linux
parentfe15c26ee26efa11741a7b632e9f23b01aca4cc6 (diff)
PCI/PM: Increase wait time after resume
PCIe r6.0 sec 6.6.1 prescribes that a device must be able to respond to config requests within 1.0 s (PCI_RESET_WAIT) after exiting conventional reset and this same delay is prescribed when coming out of D3cold (as that involves reset too). A device that requires more than 1 second to initialize after reset may respond to config requests with Request Retry Status completions (sec 2.3.1), and we accommodate that in Linux with a 60 second cap (PCIE_RESET_READY_POLL_MS). Previously we waited up to PCIE_RESET_READY_POLL_MS only in the reset code path, not in the resume path. However, a device has surfaced, namely Intel Titan Ridge xHCI, which requires a longer delay also in the resume code path. Make the resume code path to use this same extended delay as the reset path. Link: https://bugzilla.kernel.org/show_bug.cgi?id=216728 Link: https://lore.kernel.org/r/[email protected] Reported-by: Chris Chiu <[email protected]> Signed-off-by: Mika Westerberg <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]> Cc: Lukas Wunner <[email protected]>
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