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authorTudor Ambarus <[email protected]>2024-02-16 07:05:54 +0000
committerMark Brown <[email protected]>2024-03-05 20:42:59 +0000
commite8b16c7a420420a994f68c181abc4a82dcca0616 (patch)
treeffb0a9e13cbaeefd78437814d29be8bbc0350e18 /scripts/gdb/linux/vmalloc.py
parentad0adac84d42b693295f4bde407d9f20c9a694ab (diff)
spi: s3c64xx: switch gs101 to new port config data
Drop the fifo_lvl_mask and rx_lvl_offset and switch to the new port config data. Advantages of the change: - drop dependency on the OF alias ID. - FIFO depth is inferred from the compatible. GS101 integrates 16 SPI IPs, all with 64 bytes FIFO depths. - use full mask for SPI_STATUS.{RX, TX}_FIFO_LVL fields. Using partial masks is misleading and can hide problems of the driver logic. S3C64XX_SPI_ST_TX_FIFO_RDY_V2 was defined based on the USI's SPI_VERSION.USI_IP_VERSION register field, which has value 2 at reset. MAX_SPI_PORTS is updated to reflect the maximum number of ports for the rest of the compatibles. Signed-off-by: Tudor Ambarus <[email protected]> Link: https://msgid.link/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
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