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| author | Chun-Jie Chen <[email protected]> | 2021-09-14 10:16:29 +0800 |
|---|---|---|
| committer | Stephen Boyd <[email protected]> | 2021-09-14 15:05:39 -0700 |
| commit | f5bf0c1b486f908b3ff1736121cd65b0791796ec (patch) | |
| tree | 127bfbcb6eb2726aa4dd352b9043c728b8402992 /scripts/gdb/linux/utils.py | |
| parent | b5d728d8f1387352b354fa53b83c324618b29ba8 (diff) | |
clk: mediatek: Add MT8195 vppsys0 clock support
Add MT8195 vppsys0 clock controller which provides clock gate
controller for Video Processor Pipe.
Signed-off-by: Chun-Jie Chen <[email protected]>
Reviewed-by: Chen-Yu Tsai <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Stephen Boyd <[email protected]>
Diffstat (limited to 'scripts/gdb/linux/utils.py')
0 files changed, 0 insertions, 0 deletions