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authorRob Clark <[email protected]>2023-12-10 10:06:53 -0800
committerWill Deacon <[email protected]>2023-12-12 12:30:38 +0000
commitafc95681c3068956fed1241a1ff1612c066c75ac (patch)
tree90d87c4d605c79b747df538da65ac6ea7e820b09 /scripts/gdb/linux/utils.py
parent2cc14f52aeb78ce3f29677c2de1f06c0e91471ab (diff)
iommu/arm-smmu-qcom: Add missing GMU entry to match table
In some cases the firmware expects cbndx 1 to be assigned to the GMU, so we also want the default domain for the GMU to be an identy domain. This way it does not get a context bank assigned. Without this, both of_dma_configure() and drm/msm's iommu_domain_attach() will trigger allocating and configuring a context bank. So GMU ends up attached to both cbndx 1 and later cbndx 2. This arrangement seemingly confounds and surprises the firmware if the GPU later triggers a translation fault, resulting (on sc8280xp / lenovo x13s, at least) in the SMMU getting wedged and the GPU stuck without memory access. Cc: [email protected] Signed-off-by: Rob Clark <[email protected]> Tested-by: Johan Hovold <[email protected]> Reviewed-by: Robin Murphy <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Will Deacon <[email protected]>
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