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authorGuo Ren <[email protected]>2021-09-24 15:33:38 +0800
committerGuo Ren <[email protected]>2021-10-16 07:20:12 +0800
commitaf89ebaa64de726ca0a39bbb0bf0c81a1f43ad50 (patch)
tree42259e29611ea2266daeedb158aae45af783ba85 /scripts/gdb/linux/utils.py
parentfbd63c08cdcca5fb1315aca3172b3c9c272cfb4f (diff)
csky: Fixup regs.sr broken in ptrace
gpr_get() return the entire pt_regs (include sr) to userspace, if we don't restore the C bit in gpr_set, it may break the ALU result in that context. So the C flag bit is part of gpr context, that's why riscv totally remove the C bit in the ISA. That makes sr reg clear from userspace to supervisor privilege. Signed-off-by: Guo Ren <[email protected]> Cc: Al Viro <[email protected]> Cc: [email protected]
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