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| author | Chun-Jie Chen <[email protected]> | 2021-09-14 10:16:15 +0800 |
|---|---|---|
| committer | Stephen Boyd <[email protected]> | 2021-09-14 15:05:37 -0700 |
| commit | 3e9121f16cb3f4f93ad7c41a644ba384d13c2945 (patch) | |
| tree | 0d8793a80926fbd5bc7a497c46221168eb1c690a /scripts/gdb/linux/utils.py | |
| parent | 6203815bf97eeaa78ca2e47758f0232043e69ba7 (diff) | |
clk: mediatek: Add MT8195 apmixedsys clock support
Add MT8195 apmixedsys clock controller which provides Plls
generated from SoC 26m and ssusb clock gate control.
Signed-off-by: Chun-Jie Chen <[email protected]>
Reviewed-by: Chen-Yu Tsai <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Stephen Boyd <[email protected]>
Diffstat (limited to 'scripts/gdb/linux/utils.py')
0 files changed, 0 insertions, 0 deletions