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| author | Dmitry Osipenko <[email protected]> | 2020-11-23 03:27:17 +0300 |
|---|---|---|
| committer | Thierry Reding <[email protected]> | 2020-11-26 19:07:14 +0100 |
| commit | 30b81e77a051e50c1b8d5f3bb697e915231d89a8 (patch) | |
| tree | 40a5f80f2d0fdef5e247a8ba4ccec1cbac450d8a /scripts/gdb/linux/utils.py | |
| parent | d3e815eaab582398ac2257d73399c8cf741bf64b (diff) | |
ARM: tegra: Add interconnect properties to Tegra20 device-tree
Add interconnect properties to the Memory Controller, External Memory
Controller and the Display Controller nodes in order to describe hardware
interconnection.
Signed-off-by: Dmitry Osipenko <[email protected]>
Signed-off-by: Thierry Reding <[email protected]>
Diffstat (limited to 'scripts/gdb/linux/utils.py')
0 files changed, 0 insertions, 0 deletions