aboutsummaryrefslogtreecommitdiff
path: root/scripts/gdb/linux/utils.py
diff options
context:
space:
mode:
authorJarkko Nikula <[email protected]>2015-10-22 16:44:42 +0300
committerMark Brown <[email protected]>2015-10-23 08:56:05 +0900
commit0e8972187971ac6c29a9e5899fa6c555c739237c (patch)
tree2067ce59b0f5ecee77427f9a3f378ede11d90489 /scripts/gdb/linux/utils.py
parent3b8b6d05942ef5dd952674e7420600f762166e22 (diff)
spi: pxa2xx: Save other reg_cs_ctrl bits when configuring chip select
Upcoming Intel platforms use LPSS SPI_CS_CONTROL register bits 15:12 for configuring the chip select polarities. Touch only chip select SW mode and state bits when enabling the software chip select control in order to not clear any other bits in the register. Signed-off-by: Jarkko Nikula <[email protected]> Signed-off-by: Mark Brown <[email protected]>
Diffstat (limited to 'scripts/gdb/linux/utils.py')
0 files changed, 0 insertions, 0 deletions