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authorKim Phillips <[email protected]>2020-04-17 09:33:56 -0500
committerBorislav Petkov <[email protected]>2020-05-07 17:30:14 +0200
commite2abfc0448a46d8a137505aa180caf14070ec535 (patch)
tree3bbe0d705fc00cc8b19152c3ea847b1136e405f2 /scripts/gdb/linux/timerlist.py
parent66abf2388331b800f290e854cca3ae71de7977fe (diff)
x86/cpu/amd: Make erratum #1054 a legacy erratum
Commit 21b5ee59ef18 ("x86/cpu/amd: Enable the fixed Instructions Retired counter IRPERF") mistakenly added erratum #1054 as an OS Visible Workaround (OSVW) ID 0. Erratum #1054 is not OSVW ID 0 [1], so make it a legacy erratum. There would never have been a false positive on older hardware that has OSVW bit 0 set, since the IRPERF feature was not available. However, save a couple of RDMSR executions per thread, on modern system configurations that correctly set non-zero values in their OSVW_ID_Length MSRs. [1] Revision Guide for AMD Family 17h Models 00h-0Fh Processors. The revision guide is available from the bugzilla link below. Fixes: 21b5ee59ef18 ("x86/cpu/amd: Enable the fixed Instructions Retired counter IRPERF") Reported-by: Andrew Cooper <[email protected]> Signed-off-by: Kim Phillips <[email protected]> Signed-off-by: Borislav Petkov <[email protected]> Link: https://lkml.kernel.org/r/[email protected] Link: https://bugzilla.kernel.org/show_bug.cgi?id=206537
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