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authorKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>2023-12-18 16:06:56 +0100
committerBjorn Andersson <andersson@kernel.org>2023-12-19 11:13:10 -0600
commitd336355492e4ab8c1fd78e582077146e065d1924 (patch)
tree69f5e37bb1098ece7da107c8db04531cbe7e40f0 /scripts/gdb/linux/timerlist.py
parent827f5fc8d912203c1f971e47d61130b13c6820ba (diff)
arm64: dts: qcom: x1e80100: align mem timer size cells with bindings
The ARMv7 memory mapped architected timer bindings expect MMIO sizes up to 32-bit. Keep 64-bit addressing but change the size of memory mapping to 32-bit (size-cells=1) and adjust the ranges to match this. This fixes dtbs_check warnings like: x1e80100-qcp.dtb: timer@17800000: #size-cells:0:0: 1 was expected Fixes: af16b00578a7 ("arm64: dts: qcom: Add base X1E80100 dtsi and the QCP dts") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20231218150656.72892-1-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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