diff options
author | Tony Luck <[email protected]> | 2019-02-05 10:21:09 -0800 |
---|---|---|
committer | Borislav Petkov <[email protected]> | 2019-02-06 11:03:06 +0100 |
commit | cbfa482f7e2becbb774dd30117efac48819252f8 (patch) | |
tree | 2868c294615d747db3a0e847f6a23860ef70c99a /scripts/gdb/linux/timerlist.py | |
parent | d6a9f7336d925364daca00557afa59a68e78b422 (diff) |
EDAC, skx_common: Add code to recognise new compound error code
A new error code for systems that use DRAM as an extra level of cache
looks like:
000F 0010 1MMM CCCC
where the MMM and CCCC bits are used for the same purpose as the
original code. For this new class of errors the ADXL translation will
provide details of both the DIMM used as cache for the error location
and the component that is being cached.
Note: This new error code is first supported in Skylake. Older EDAC
drivers do not need to be updated.
Signed-off-by: Tony Luck <[email protected]>
Signed-off-by: Borislav Petkov <[email protected]>
Cc: Aristeu Rozanski <[email protected]>
Cc: James Morse <[email protected]>
Cc: Mauro Carvalho Chehab <[email protected]>
Cc: Qiuxu Zhuo <[email protected]>
Cc: linux-edac <[email protected]>
Link: https://lkml.kernel.org/r/[email protected]
Diffstat (limited to 'scripts/gdb/linux/timerlist.py')
0 files changed, 0 insertions, 0 deletions