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| author | Nicholas Kazlauskas <[email protected]> | 2021-07-08 12:59:59 -0400 |
|---|---|---|
| committer | Alex Deucher <[email protected]> | 2021-07-21 14:23:57 -0400 |
| commit | a8e380fd8d71493623c94511f75e81786cffa223 (patch) | |
| tree | 81df4d87edb6bfdd38495b8a1079bb1a0d49773c /scripts/gdb/linux/timerlist.py | |
| parent | b0364fa4fc045685f827ea34c0149c953d0240bd (diff) | |
drm/amd/display: Update bounding box for DCN3.1
[Why & How]
We're missing a default value for dram_channel_width_bytes in the
DCN3.1 SOC bounding box and we don't currently have the interface in
place to query the actual value from VBIOS.
Put in a hardcoded default until we have the interface in place.
Reviewed-by: Eric Yang <[email protected]>
Acked-by: Rodrigo Siqueira <[email protected]>
Signed-off-by: Nicholas Kazlauskas <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'scripts/gdb/linux/timerlist.py')
0 files changed, 0 insertions, 0 deletions