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| author | Zhang Rui <rui.zhang@intel.com> | 2024-06-28 11:17:57 +0800 |
|---|---|---|
| committer | Peter Zijlstra <peterz@infradead.org> | 2024-07-04 16:00:34 +0200 |
| commit | a31000753d41305d2fb7faa8cc80a8edaeb7b56b (patch) | |
| tree | d8bf8b4f5fcc2b8e606ccbad63a24c9a33940c51 /scripts/gdb/linux/timerlist.py | |
| parent | 2c3aedd9db6295619d21e50ad29efda614023bf1 (diff) | |
perf/x86/intel/cstate: Add Arrowlake support
Like Alderlake, Arrowlake supports CC1/CC6/CC7 and PC2/PC3/PC6/PC8/PC10.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Reviewed-by: Kan Liang <kan.liang@linux.intel.com>
Link: https://lore.kernel.org/r/20240628031758.43103-3-rui.zhang@intel.com
Diffstat (limited to 'scripts/gdb/linux/timerlist.py')
0 files changed, 0 insertions, 0 deletions