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author | Jeffrey Hugo <[email protected]> | 2022-05-11 09:23:19 -0600 |
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committer | Wei Liu <[email protected]> | 2022-05-11 17:51:02 +0000 |
commit | a2bad844a67b1c7740bda63e87453baf63c3a7f7 (patch) | |
tree | c9e7f2de5f20aa27238d60c7829f06f40384e28b /scripts/gdb/linux/timerlist.py | |
parent | b4b77778ecc5bfbd4e77de1b2fd5c1dd3c655f1f (diff) |
PCI: hv: Fix interrupt mapping for multi-MSI
According to Dexuan, the hypervisor folks beleive that multi-msi
allocations are not correct. compose_msi_msg() will allocate multi-msi
one by one. However, multi-msi is a block of related MSIs, with alignment
requirements. In order for the hypervisor to allocate properly aligned
and consecutive entries in the IOMMU Interrupt Remapping Table, there
should be a single mapping request that requests all of the multi-msi
vectors in one shot.
Dexuan suggests detecting the multi-msi case and composing a single
request related to the first MSI. Then for the other MSIs in the same
block, use the cached information. This appears to be viable, so do it.
Suggested-by: Dexuan Cui <[email protected]>
Signed-off-by: Jeffrey Hugo <[email protected]>
Reviewed-by: Dexuan Cui <[email protected]>
Tested-by: Michael Kelley <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Wei Liu <[email protected]>
Diffstat (limited to 'scripts/gdb/linux/timerlist.py')
0 files changed, 0 insertions, 0 deletions