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authorRobert Hancock <[email protected]>2021-03-25 13:26:37 -0600
committerStephen Boyd <[email protected]>2021-06-27 19:58:14 -0700
commit78f6f406026d688868223d5dbeb197a4f7e9a9fd (patch)
tree2f00bef9a1f8bc772d379321f994615262da62c1 /scripts/gdb/linux/timerlist.py
parent6e7d2de1e000d36990923ed80d2e78dfcb545cee (diff)
clk: si5341: Avoid divide errors due to bogus register contents
If the Si5341 is being initially programmed and has no stored NVM configuration, some of the register contents may contain unexpected values, such as zeros, which could cause divide by zero errors during driver initialization. Trap errors caused by zero registers or zero clock rates which could result in divide errors later in the code. Fixes: 3044a860fd ("clk: Add Si5341/Si5340 driver") Signed-off-by: Robert Hancock <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Stephen Boyd <[email protected]>
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