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authorSudeep Holla <[email protected]>2021-05-18 17:36:18 +0100
committerWill Deacon <[email protected]>2021-05-26 17:14:09 +0100
commit3fdc0cb59d97f87e2cc708d424f1538e31744286 (patch)
treeae9d695494b9c66a9c6f6f67926ab26c32a1efd0 /scripts/gdb/linux/timerlist.py
parent6efb943b8616ec53a5e444193dccf1af9ad627b5 (diff)
arm64: smccc: Add support for SMCCCv1.2 extended input/output registers
SMCCC v1.2 allows x8-x17 to be used as parameter registers and x4—x17 to be used as result registers in SMC64/HVC64. Arm Firmware Framework for Armv8-A specification makes use of x0-x7 as parameter and result registers. There are other users like Hyper-V who intend to use beyond x0-x7 as well. Current SMCCC interface in the kernel just use x0-x7 as parameter and x0-x3 as result registers as required by SMCCCv1.0. Let us add new interface to support this extended set of input/output registers namely x0-x17 as both parameter and result registers. Acked-by: Mark Rutland <[email protected]> Tested-by: Michael Kelley <[email protected]> Reviewed-by: Michael Kelley <[email protected]> Cc: Will Deacon <[email protected]> Cc: Catalin Marinas <[email protected]> Signed-off-by: Sudeep Holla <[email protected]> Reviewed-by: Mark Brown <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Will Deacon <[email protected]>
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