diff options
| author | Emil Renner Berthing <emil.renner.berthing@canonical.com> | 2023-10-31 15:14:43 +0100 |
|---|---|---|
| committer | Conor Dooley <conor.dooley@microchip.com> | 2023-11-22 11:58:08 +0000 |
| commit | 3d70b9853b44d3f034acaf5e3be7d5228daddef4 (patch) | |
| tree | 4107271f266deb65b4fc905df2cec046bfebff22 /scripts/gdb/linux/timerlist.py | |
| parent | 971f128bb2d9314203d365b7f163a5c35167bb6b (diff) | |
dt-bindings: cache: sifive,ccache0: Add StarFive JH7100 compatible
This cache controller is also used on the StarFive JH7100 SoC.
Unfortunately it needs a quirk to work properly, so add dedicated
compatible string to be able to match it.
Signed-off-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Diffstat (limited to 'scripts/gdb/linux/timerlist.py')
0 files changed, 0 insertions, 0 deletions