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authorLad Prabhakar <[email protected]>2021-06-09 16:32:29 +0100
committerGeert Uytterhoeven <[email protected]>2021-06-10 15:35:28 +0200
commit68a45525297b2e9afbd9bba807ddd2c9f69beee6 (patch)
tree9bda157395d1e633c59e1eb8a0e15943523569f4 /scripts/gdb/linux/tasks.py
parentc4bcdb3e30ea815e3ccf04a97b7b5373f8606bc8 (diff)
arm64: dts: renesas: Add initial DTSI for RZ/G2{L,LC} SoC's
Add initial DTSI for RZ/G2{L,LC} SoC's. File structure: r9a07g044.dtsi => RZ/G2L family SoC common parts r9a07g044l1.dtsi => RZ/G2L R9A07G044L1 SoC specific parts r9a07g044l2.dtsi => RZ/G2L R9A07G044L2 SoC specific parts Signed-off-by: Lad Prabhakar <[email protected]> Signed-off-by: Biju Das <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Geert Uytterhoeven <[email protected]>
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