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authorThomas Petazzoni <[email protected]>2015-06-09 18:47:15 +0200
committerLinus Walleij <[email protected]>2015-06-10 14:00:54 +0200
commit50a7d13d241081838c6cd12b1fdabc36838f9b4c (patch)
treef4aad06b6655ddc078037c2510619a7ef358542c /scripts/gdb/linux/tasks.py
parent9e05db29e2ac7f1fec1a4d15db8c419634290535 (diff)
pinctrl: mvebu: armada-xp: rename spi to spi0
After updating to the latest Armada XP datasheet, we discovered that there is a second SPI bus accessible from the MPP pins, called 'spi1'. In order to be consistent with other SoCs having two SPI busses, this commit renames the functions of the first SPI bus to 'spi0' instead of just 'spi'. This commit obviously breaks the DT backward compatibility for the people using the "spi" function name in their Device Tree. Signed-off-by: Thomas Petazzoni <[email protected]> Signed-off-by: Linus Walleij <[email protected]>
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