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authorChee Nouk Phoon <[email protected]>2015-04-24 02:32:07 -0500
committerDavid S. Miller <[email protected]>2015-04-25 14:41:52 -0400
commit20d96964b51844d4f3bea0249f62db7073c13c30 (patch)
tree56b5162551f235e0fb270cf784a39ae58571a118 /scripts/gdb/linux/tasks.py
parent3051f39253680624504021fd3b29fc621a4fd6b6 (diff)
net: eth: altera: Resolve false errors from MSGDMA to TSE
This patch resolves false errors from MSGDMA in TX mSGDMA MM to ST mode, and is a continuation of the patch recently submitted by Andrea Oetken. The MSGDMA had a logic bug that masked detection of this issue prior to Quartus 14.1/Build 164. When the MSGDMA logic bug was addressed in Quartus 14.1/Build 164, the driver problem was exposed. The problem is corrected by making sure MSGDMA_DESC_CTL_TR_ERR_IRQ is not set for any of the transmit DMA descriptors, and only used for receive descriptors. Fixes: 71cd26e altera tse: Error-Bit on tx-avalon-stream always set. Signed-off-by: Chee Nouk Phoon <[email protected]> Signed-off-by: Vince Bridgers <[email protected]>a Cc: Andreas Oetken <[email protected]> Signed-off-by: David S. Miller <[email protected]>
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