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authorFabio Estevam <[email protected]>2017-01-30 09:12:11 -0200
committerGreg Kroah-Hartman <[email protected]>2017-01-31 10:54:58 +0100
commit1a613626d2895f4f6b95a3b0a6413e52e00b5f95 (patch)
tree3e99a29f2287675072b10bbb187d7883fde6dd16 /scripts/gdb/linux/tasks.py
parentaa42db44f6705334c6130103492484ea3c7199b3 (diff)
serial: imx: Fix the RTS GPIO polarity in RS485 mode
On a board that needs to drive RTS GPIO high in order to enable the transmission of a RS485 transceiver the following description is passed in the devide tree: &uart4 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart4>; rts-gpios = <&gpio6 2 GPIO_ACTIVE_HIGH>; status = "okay"; }; and userspace configures the uart port as follows: /* enable RS485 mode: */ rs485conf.flags |= SER_RS485_ENABLED; /* set logical level for RTS pin equal to 1 when sending: */ rs485conf.flags |= SER_RS485_RTS_ON_SEND; /* set logical level for RTS pin equal to 0 after sending: */ rs485conf.flags &= ~(SER_RS485_RTS_AFTER_SEND); However the RTS GPIO polarity observed in the oscilloscope is inverted. When the SER_RS485_RTS_ON_SEND flag is set the imx_port_rts_active() function should be called and following the same logic when SER_RS485_RTS_AFTER_SEND flag is cleared the imx_port_rts_inactive() should be called. Do such logic change so that RS485 communication in half duplex can work successfully when the RTS GPIO pin is passed via device tree. Signed-off-by: Fabio Estevam <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
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