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authorMarek Vasut <marex@denx.de>2024-04-05 22:21:53 +0200
committerShawn Guo <shawnguo@kernel.org>2024-04-22 12:33:30 +0800
commit10947b276b90df38e60aa3efd6b4b7a4b3c92fab (patch)
tree8db6246a3d0a737bacb510fb55413522f4634149 /scripts/gdb/linux/tasks.py
parent00b436182138310bb8d362b912b12a9df8f72ca3 (diff)
arm64: dts: imx8mp: Fix assigned-clocks for second CSI2
The first CSI2 pixel clock are supplied from IMX8MP_CLK_MEDIA_CAM1_PIX_ROOT, the second CSI2 pixel clock are supplied from IMX8MP_CLK_MEDIA_CAM2_PIX_ROOT, both clock are supplied from SYS_PLL2 and configured using assigned-clock DT properties. Each CSI2 DT node configures its IMX8MP_CLK_MEDIA_CAMn_PIX_ROOT clock. This used to be the case until likely a copy-paste error in commit f78835d1e616 ("arm64: dts: imx8mp: reparent MEDIA_MIPI_PHY1_REF to CLK_24M") which changed the second CSI2 node to configure IMX8MP_CLK_MEDIA_CAM1_PIX_ROOT using its assigned-clocks property. Fix the second CSI2 assigned-clock property back to the original correct IMX8MP_CLK_MEDIA_CAM2_PIX_ROOT . Fixes: f78835d1e616 ("arm64: dts: imx8mp: reparent MEDIA_MIPI_PHY1_REF to CLK_24M") Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'scripts/gdb/linux/tasks.py')
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