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authorDuncan Ma <[email protected]>2022-08-24 14:35:03 -0400
committerAlex Deucher <[email protected]>2022-09-13 14:27:00 -0400
commit0b15b1ec8b74bd5c9a4e4cbadab82c0657832799 (patch)
treeff5f0212a7dcca99195a66804d5828242c3e0b96 /scripts/gdb/linux/tasks.py
parent82c4018479fba63db8db7c7fbfd9e4afba95603a (diff)
drm/amd/display: Correct dram channel width for dcn314
[Why] The interpretation of the number of memory channels differ by memory type, and this affects channel width for the DML input. [How] Set dram channel width according to memory type for dcn314. Tested-by: Daniel Wheeler <[email protected]> Reviewed-by: Nicholas Kazlauskas <[email protected]> Reviewed-by: Jun Lei <[email protected]> Acked-by: Pavle Kotarac <[email protected]> Signed-off-by: Duncan Ma <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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